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Exam Code: 70-742
Exam Name: Identity with Windows Server 2016
Updated: Jul 07, 2017
Q&As: 49
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PASS4ITSURE LATEST AND MOST ACCURATE Microsoft 70-742 DUMPS EXAM Q&AS:
QUESTION NO: 16
Which is the best power saving mode to use while waiting to obtain a lock on a semaphore?
A. Dormant
B. Standby
C. Shutdown
D. Deep sleep
70-742 dumps Answer: B
QUESTION NO: 17
Which privileged mode can kernel code use to get direct access to the User mode registers R13
and R14?
A. Abort mode
B. System mode
C. Hypeivisor mode
D. Supervisor mode
Answer: B
QUESTION NO: 18
An Advanced SIMD intrinsic has the prototype:
int16x4_t vmul_n_s16(int16x4_t a, int16_t b);
How many multiplications does this intrinsic compute?
A. 1 multiplication
B. 4 multiplications
C. 16 multiplications
D. 64 multiplications
70-742 pdf Answer: B
QUESTION NO: 19
Which of the following memory attributes, specified in a translation table entry, could be used to
protect a page containing a read-sensitive peripheral from speculative instruction fetches?
A. S (Secure)
B. nG (non-Global)
C. xN (Execute Never)
D. AP (Access Permission)
Answer: C
QUESTION NO: 20
An ARMv7 implementation might include the VFPv4-D32 floating point extension. What does the
’32’ indicate?
A. The width of the datapath in bits
B. The number of double precision floating point registers implemented
C. The number of bits of data that can be loaded or stored at once
D. The number of integer operations that can be performed simultaneously
70-742 exam Answer: B
QUESTION NO: 21
It is common to declare structures as “packed” in order to minimize data memory size. Which of
the following accurately describes the effect of this?
A. Members will be stored as bit-fields
B. Data Aborts will be disabled for all structure accesses
C. Structure members will be re-ordered so that the smallest are first
D. Multi-byte members are not required to be naturally aligned
Answer: D
QUESTION NO: 22
When debugging an embedded Linux system, which one of the following techniques can be used
to halt a single user thread, while allowing other threads to continue to run during the debug
process?
A. Halting a single user thread in an embedded Linux system is not possible
B. Use the Linux kernel printk() function to output messages to the console
C. Connect a Linux-aware JTAG debugger to the target, which allows single-stepping of the code
D. Connect a debugger running on an external host device to an instance of gdbserver running on
the target, using Ethernet
70-742 vce Answer: D
QUESTION NO: 23
Which of the following processors includes a Generic Interrupt Controller as a standard
component?
A. Cortex-A8
B. Cortex-M3
C. Cortex-R4F
D. Cortex-A9 MPCore
Answer: D
QUESTION NO: 24
Assume a multicore processor with coherency management based on the MESI protocol. When a
core changes the contents of a shared cache line, what is the final status of that line in the local
cache?
A. Modified
B. Exclusive
C. Shared
D. Invalid
70-742 dumps Answer: A
QUESTION NO: 25
How is data written into NOR flash memory?
A. Data can only be written once, when the flash device is being manufactured
B. Writing data to the memory locations using store instruction, as you would with RAM
C. Reading and writing specific registers following a device-specific procedure
D. Using an external programming device, which utilizes an ultra-violet lamp to alter the data
stored on the device
Answer: C
QUESTION NO: 26
Under which of the following data-sharing scenarios would cache maintenance operations be
necessary?
A. Sharing data with another thread running on the same core
B. Sharing data with another process running on the same core
C. Sharing data with an external device
D. Sharing data with another CPU in an SMP system
70-742 pdf Answer: C
QUESTION NO: 27
A Just-In-Time compiler writes instructions to a region of memory that is configured using a
writeback cache strategy. For the locations that have been written, what is the MINIMUM cache
maintenance that MUST be performed before the new instructions can be reliably executed?
A. Instruction cache clean only
B. Instruction cache invalidate only
C. Data cache clean and instruction cache invalidate
D. Data cache invalidate and instruction cache invalidate
Answer: C
QUESTION NO: 28
Which of the following statements best describes a Board Support Package (BSP)?
A. PC interface hardware for configuring a boot monitor
B. Hardware specific source code needed for operating system support
C. A working port of Linux for a specific hardware platform
D. Debugging hardware and software supplied with a development board
70-742 exam Answer: B
QUESTION NO: 29
In the Generic Interrupt Controller (GIC) architecture, which of the following ID numbers are
reserved for interrupts that are private to a CPU interface?
A. ID0-ID7
B. ID0-ID15
C. ID0-ID31
D. ID0-ID63
Answer: C
QUESTION NO: 30
What is the value of r0 after executing the following instruction sequence?
MOV r0, #200
MOV r5, #1
STR r3, [r0, r5, LSL#3]!
A. 200
B. 201
C. 204
D. 208
70-742 vce Answer: D
QUESTION NO: 31
Which of the following properties is a required characteristic of a Symmetric Multiprocessing
(SMP) system?
A. All processors have the same view of memory
B. An even number of processors is included
C. All processors run in the same power state
D. All processors switch between operating system tasks in lock-step
Answer: A
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